An RFSoC-based F-engine for ARGOS

¹ Max-Planck-Institut für Radioastronomie, Auf dem Hügel 69, 53121 Bonn, Germany
² Institute of Astrophysics, Foundation for Research and Technology Hellas, N. Plastira 100, 70013 Heraklion, Greece

^★ Corresponding author: ypmen@mpifr-bonn.mpg.de

Received: 25 July 2025
Accepted: 17 September 2025

Abstract

Context. Radio interferometers provide the means to perform the wide field-of-view (FoV) high-sensitivity observations required for modern radio surveys. As computing power per cost has increased, there has been a move toward larger arrays of smaller dishes, such as DSA-2000, the upcoming HIRAX, CHORD, and SKA radio telescopes. Such arrays can have simpler receiver designs with room-temperature low-noise amplifiers and use direct sampling to greatly reduce the cost per antenna. The ARGOS project is currently developing an array of five six-meter antennas that will be used to demonstrate the technology required for a next-generation “small-D, big-N” radio interferometer in Europe.

Aims. For this work our objective was to implement a first-stage digital signal processing system for the ARGOS demonstrator array, providing digitization, channelization, delay correction, and frequency-dependent complex gain correction. The system is intended to produce delay- and phase-corrected dual-polarization channelized voltages in the frequency range 1-3 GHz with a nominal channel bandwidth of 1 MHz.

Methods. We used a Radio Frequency System-on-Chip (RFSoC) 4 × 2 evaluation board with four analog-to-digital converters (ADCs) that can simultaneously sample two 1 GHz dual-polarization bands. A critically sampled polyphase filter bank (PFB) using an 8-tap finite impulse response (FIR) filter and a 2048-point fast Fourier transform (FFT) was applied to channelize the input data. Coarse and fine delays were corrected separately before and after the PFB. The post-PFB data were gain corrected before a corner-turner was applied to transpose the channelized data into time-minor order for efficient network transmission. The data were packetized and transmitted over a 100-GbE network. We used Xilinx Vitis HLS C++ to develop the required firmware as a set of customizable modules suitable for rapid prototyping.

Results. We performed hardware verification of the channel response of the critically sampled PFB and of the delay correction, showing both to be consistent with theoretical expectations. Furthermore, the board was installed at the Effelsberg 100-meter radio telescope where we performed commensal pulsar observations with the Effelsberg Direct Digitization backend, showing comparable performance. This work demonstrates the utility of high-level synthesis (HLS) languages in the development of high-performance radio astronomy processing backends.